Miniaturization and portability are overwhelming trends in customer electronics which pushed the Integrated Circuit (IC) package to be more compact. New packaging methods, for example, three-dimension packaging (3D-Packaging) technology, have been used to achieve such goals. For the 3D-packaging technology, two or more dies with respective functions are overlapped one onto another in a single package. The packaged dies might include central processing unit (CPU) chips, field-programmable gate array (FPGA) chips, radio frequency (RF) chips, memory chips, flash chips, analog chips, power device chips, and so on. Compared with conventional 2D-packaging methods for which dies are placed side by side, the 3D packaging method stacks the dies in a compact space with small footprint on a printed circuit board (PCB). Also, the 3D-packaging technique can allow packages to have shorter delay, lower noise, higher speed, and fewer parasitical effects than other packaging techniques.
FIG. 1 illustrates a tri-stacked 3D-package 11 in accordance with the prior art. An integrated circuit system 10 includes a first IC die 101 such as a controller die, a second IC die 102 such as a first power die, and a third die 103 such as a second power die stacked on one another. The integrated circuit system 10 is assembled in the package 11 as a ball grid array package in FIG. 1. The third IC die 103 is attached to a top surface of a package substrate 112 and solder balls 113 are positioned on a back surface of the package substrate 112 to connect the package 11 onto a PCB.
The electrical communication between the stacked dies 101,102,103 and the package substrate 112 is formed by metal bonding wires 111. The bonding wires 111 are leaded from the contact pads 115 on the dies 101,102,103, and are attached to the substrate 112. The electrical connection among dies 101, 102, 103 can also be by bonding wires 111 (not shown in FIG. 1).
Although the package 11 can provide relatively high packaging density, it has drawbacks due to the bonding wires. First, the bonding wires require extra area beyond the dies 101, 102, 103 for wire span and contact pad on substrate, and thus can limit further miniaturization of the package 11. Also, a lower die must be large enough than the upper die to expose the contact pad for connection, thus the die area is restricted. Additionally, a relatively thin and long metal bonding wire typically has relative high resistance, parasitical capacity and inductance unsuitable in a high power system. Finally, the use of wire bonding technology can have high cost and high process time because the wires are made of gold and fabricated one layer at a time.